The present invention relates to semiconductor technologies, and more particularly to a method of manufacturing a semiconductor device.
In the next generation manufacturing processes of integrated circuits, high-k (HK) dielectrics are usually used in the fabrication of gate structures in metal-oxide-semiconductor (MOS) devices. Whether in a HK-first or a HK-last scheme, aluminum diffusion is always a problem affecting a device's reliability and performance parameters, such as time dependent dielectric breakdown (TDDB), negative bias temperature instability (NBTI), positive bias temperature instability (PBTI), and the like. Aluminum diffusion may also degrade carrier mobility, which in turn affects a device's performance.
The inventors have observed that there are two paths for aluminum diffusion. One of them is through the middle region of a gate trench; and the other is through the sidewall of a gate trench. Currently, the negative work function (NWF) metal layer is formed by physical vapor deposition (PVD) of TiAl. Such NWF layer has a strong tensile stress. After deposition and the following thermal treatment, the NWF metal layer at the bottom of the gate trench has a “bow” shape. That is, the TiAl layer is thicker in the middle of the bottom of the gate trench than near the sidewall of the gate trench, as illustrated in FIG. 1. As a result, aluminum is more likely to diffuse downward through the sidewall than through the middle region of the bottom of the gate trench.
Therefore, there is a need for a better manufacturing method.